Half and full subtracted circuit, design and implementation

Half Subtractor in Digital Logic

It  is a combinational circuit that performs subtraction of two binary bits. It has two inputs (minuend and subtrahend) and two outputs Difference (D) and Borrows (Bout). We use half-subtractor to subtract the LSB of the subtrahend to the LSB of the minuend when one binary number is subtracted from another. 

Half subtractor is the most essential combinational logic circuit which is used in digital electronics. Basically, this is an electronic device or in other terms, we can say it as a logic circuit. Half subtractor is used to perform two binary digits subtraction. In the previous article, we have already discussed the concepts of half adder and a full adder circuit which uses the binary numbers for the calculation. 

Half Subtractor ( HS )

Truth Table

Logical Expression

 Difference = A XOR B

Borrow =

Implementation

Application of Half Subtractor

The applications of half subtractor include the following.

• Half subtractor is used to reduce the force of audio or radio signals
• It can be used in amplifiers to reduce the sound distortion
• Half subtractor is used in ALU of processor
• It can be used to increase and decrease operators and also calculates the addresses
• Half subtractor is used to subtract the least significant column numbers. For subtraction of multi-digit numbers, it can be used for the LSB.

Full Subtractor in Digital Logic

A full subtractor is a combinational circuit that performs subtraction of two bits, one is minuend and other is subtrahend, taking into account borrow of the previous adjacent lower minuend bit. This circuit has three inputs and two outputs. The three inputs A, B and Bin, denote the minuend, subtrahend, and previous borrow, respectively. The two outputs, D and Bout represent the difference and output borrow, respectively.

Full Subtractor also belongs to the class of a combinational circuit and is used to perform subtraction of two binary bits. The half-subtractor can only be used for subtraction of LSB bits, but if there occurs a case of borrow during subtraction of LSB bits, then it can have affected over subtraction in higher columns

Truth Table –

From above table we can draw the K-Map as shown for “difference” and “borrow”.

Logic Circuit for Full Subtractor –

Implementation of Full Subtractor using Half Subtractors –
2 Half Subtractors and an OR gate is required to implement a Full Subtractor.

Designing of Full Subtractor using Half-Subtractors

A Full-Subtractor can also be implemented using two half-subtractors and one OR gate. The circuit diagram for this can be drawn as,